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$1.59
Texas Instruments TLC555IDR TLC555IDR Timer Oscillator & Pulse Generator 2.1MHz 2V to 15V SOIC-8—
$1.59
The Story
The TLC555IDR is a monolithic Low Power Timer fabricated using the TI LinCMOS� process. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltage. It has a trigger level equal to approximately 1/3rd of the supply voltage and a threshold level equal to approximately 2/3rd of the supply voltage. This level can be altered by use of the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs and can be used to initiate a new timing cycle. If RESET is low the flip-flop is reset and the output is low.
- Capable of operation in astable mode
- CMOS output capable of swinging rail to rail
- Output fully compatible with CMOS, TTL and MOS
- Low supply current reduces spikes during output transitions
- ESD protection exceeds 2000V per MIL-STD-883C, method 3015.2
- Green product and no Sb/Br
Clock & Timing, Communications & Networking
Other details
| Brand | TEXAS INSTRUMENTS |
| Part Number | TLC555IDR |
| Quantity | Each (Supplied on Cut Tape) |
| Product Change Notice EN |  |
All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them. Image is for illustrative purposes only. Please refer to product description.
Description
The TLC555IDR is a monolithic Low Power Timer fabricated using the TI LinCMOS� process. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltage. It has a trigger level equal to approximately 1/3rd of the supply voltage and a threshold level equal to approximately 2/3rd of the supply voltage. This level can be altered by use of the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs and can be used to initiate a new timing cycle. If RESET is low the flip-flop is reset and the output is low.
- Capable of operation in astable mode
- CMOS output capable of swinging rail to rail
- Output fully compatible with CMOS, TTL and MOS
- Low supply current reduces spikes during output transitions
- ESD protection exceeds 2000V per MIL-STD-883C, method 3015.2
- Green product and no Sb/Br
Clock & Timing, Communications & Networking
Other details
| Brand | TEXAS INSTRUMENTS |
| Part Number | TLC555IDR |
| Quantity | Each (Supplied on Cut Tape) |
| Product Change Notice EN | |
All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them. Image is for illustrative purposes only. Please refer to product description.
